VIA in pad

[eric_engineer]

Is it still not possible to place a via in a SMD Pad without a DRC error? In 2024.

[marcocipriani01]

Just set the clearance between vias and SMD pads to 0mm in the Layer Stack Manager, and you're golden.

[eric_engineer]

This is going to ignore spacing problems with regular vias though.  I get that it helps but it's not a solution.

[marcocipriani01]

That's why I always tell JLCPCB to epoxy-fill each and every via on my 6 layers boards. It's free anyway, at least with them, and it saves me from mistakes 😂

[jorge_garcia]

Hello @eric_engineer,

I hope you're doing well. In Electronics, via in pads are best handled as micro-vias. You can set micro-vias in the sizes tab, the key to enabling them is to make sure the min micro via smaller than the minimum drill. 

Always remember that you never have to pre-place vias, the routing engine will let you place them on the center of the pad as long as violations are not incurred. Thinking about it now, you might now have to do the micro-via thing or any other special config. It does work though.

Let me know if you continue to run into problems.

Best Regards,

[eric_engineer]

hi @jorge_garcia I'm still not sure how to do this the right way? It allows me to place the via but complains about SMD overlap. 

[jorge_garcia]

Hi @eric_engineer,

I hope you're doing well. Would you be willing to do a screen capture showing how you got it routed? The DRC rules have been reworked relatively recently I want to make sure this isn't a new DRC issue.

Thank you in advanced @eric_engineer for reaching out.

Let me know if there's anything else I can do for you.

Best Regards,

[eric_engineer]

Sure, whenever you have the time, just let me know. I'm here now, but off tomorrow.