Differential pair spacing

[eric_engineer]

How do I set my differential pair spacing?  I see a width option but no spacing option. I hope this is not one of those things that's missing or can be fixed by modifying a DRC rule that affects everything else.  It's amazing to me that Fusion sells a Ansys high-speed design option, but lacks so many basic differential pair and other high speed routing functions. We can't route any of our high-speed stuff with 360 but I'd like to.

[Evert_2N3055]

This is controlled via DRC setting and through NET classes. So I would set special net class to DP and set appropriate rules.

[marcocipriani01 · Accepted solution]

This is probably the single stupidest thing about doing high-speed designs in Fusion Electronics. You can only set the minimum spacing between two wires of the same net class, using the "Clearance Matrix" in the "Net Class" settings. There is no way of setting a fixed spacing between two signals in a differential pair...

In the following example, I've set the spacing between USB_D_P and USB_D_N by creating a USB net class and defining a 0.254mm clearance between the USB net class and itself (look on the diagonal of the matrix).

The Fusion team should definitively improve differential routing, IMHO. The Meanders tool is awful to use.

[eric_engineer]

Oh, I forgot about this. Thanks.  Yeah, high-speed support in general is pretty awful I feel. I'm remembering now that last design I had to do groups of length matched diff pairs and I had to do all the matching slowly by hand.

[jorge_garcia]

Hi everyone,

Thank you for your comments, this stuff is actually being addressed in the near term so expect some improvements soon. 

Our developers ran into this thread before I had a chance to report it so your feedback is very much of interest to our team.

One thing to help in the mean time. When you are routing the meanders you can enter a length in the CLI and press enter. So once you know what the longest diff pair is you can meander all the other to that length by entering the length in the command line.

Another thing that will help is starting meanders from one end of a segment and working your way towards the other end. In the DRC set your Gap Factor to 1 in the Misc tab. Those things will help.

All of this is being addressed, but the above can help for now.

Let me know if there's anything else I can do for you.

Best Regards,

[pblase]

How? There's no where to set the rules.

[jorge_garcia]

Hi @pblase ,

So now there are rules for differential pairs. What do you specifically need? You can set up rules for spacing, length, clearance to other objects. 

Let me know what you are looking for.

Best Regards,

[eric_engineer]

Off the top of my head.  Pair to pair length match (really with awareness of how signals travel at different speed on a surface microstrip vs embedded in inner layers). Lane grouping, so length matching within a group of diff pairs.  For example four data pairs plus one clock where you could say which one was the reference dimension i.e. clock.  Inter group length matching is also useful.  Definitely width based on layer so it might be 4-8-4 in the outer but different on the inner layers.  Most important is a real time view of the lengths and violations as you are working.  A real time view, not run a report, put it excel etc.  Either a live table or a little marker at the end of my mouse showing me I'm 10ps over.  Pair to pair gap would be useful, and so would valid neck down rules that actually work.

[pblase]

I think that I've got it, but it's very non-intuitive. You have to set the differential pairs as a net class, then set the minimum and nominal spacing for the class. 

What I'm concerned with at the moment is the impedance for the pair. 

https://www.digikey.com/en/resources/conversion-calculators/conversion-calculator-pcb-trace-impedanc...

which is determined by trace width, the spacing between the pair, the dielectric impedance of the substrate, and the height of the trace above the ground plane (the latter two items determined by the rules obtained from the board manufacturer). Ideally, I'd be able to set the desired impedance and Fusion would calculate the trace width and/or spacing. Next best thing is that for each pair I can set the width and spacing in the "Route Differential Pair" box. 

Another related point is that when running a trace, the connector at the other end is not always ideally laid out. 

In this board, the specified impedance for the MIPI pairs is 100 Ohms, which translates to a 12 mil trace width and an 8 mil spacing. The problem is that the connector pads are only 8 mils wide themselves, which gives all kinds of errors when I try to start the pairs right at them. As in the screenshot, I had to run a short 8 mil stub out for the trace to attach to. This may or may not be the optimum way to solve the problem. (If I make the pair traces 8 mils wide, the spacing is only 4 mils).  When I do this, though, when I try to start the differential pair at the stub, Fusion naturally reset the trace width to 8 mils! I had to go through some annoying contortions to get things attached and scaled properly.  There has to be an easier way to do this. 

[pblase]

Yes. In my case, see the picture above, I have 5 pairs of traces for a MIPI camera connection. all of them need controlled impedance, which depends on trace width and spacing, and need to be matched between pairs to a reasonable degree. 

[jorge_garcia]

Hi @eric_engineer and @pblase ,

These are situations where the old signal integrity extension would come in handy. For now there is no mechanism to do controlled impedance in Fusion, but it's obviously something we would like to do.

Netclasses is a useful scope but it's not the only way to do it. Clearance rules can be set for same signal or different signal interactions. So for example, you could set a clearance rule between the _N and _P diff signals, that's pretty natural. That gives you the control for individual diff pairs. Now, using netclass you could use a Match length rule to get all the pairs of a certain bus to match to the correct length. It's a powerful system but it takes some creativity to get the best out of it. I made a video with some examples a little while ago.

https://www.youtube.com/watch?v=uH0FzDQV5ks&list=PLmA_xUT-8UlKCpCBFJNu7i46UsMarLDJg&index=4&t=5s

You can neck down by using different preferred and minimum values, it will also keep contortions to a minimum. By default the route command will start with the preferred value but you can manually drop to min to neck down and then switch back to preferred when ready. Running the short stub is a perfectly valid approach especially when space is tight since it will minimally affect the impedance profile of the trace as long as you keep it short. 

Width rules can be set based on layers along with other scopes, I believe I have an example of this in the video above. To me setting up rules with the proper scopes and values minimizes having to manually switch width values in these scenarios. In most cases you can achieve what you need through judicious use of preferred and min values.

Let me know if you have any other questions or concerns.

Best Regards,

[pal.szabo]

Hi @eric_engineer ,

I have done some manual high-speed routing back in Eagle using a modified length.ulp and Excel, but it was a real pain. Now, there is a Fusion add-in that addresses most of the lacking functionality you mentioned for high speed signal length/delay matching (pair-to-pair, propagation speed on surface/embedded, lane grouping, 'almost' live table) and some more (via lengths are included, grouping of signals for multi-signal propagation paths). It's free, open-source, and available for Windows/Mac. It's called Electronics Extended Toolbox, and is available from the Autodesk App Store and GitHub. You might want to give it a try.

Best regards,

Paul