"no such vector" running Spice

Anonymous · ‎10-30-2019

I successfully ran a Spice simulation on my complete schematic but in order to get a better understanding of how it's working I'm now trying to run a simulation (AC sweep) of just one of 3 filters. I get the error:

Error(parse.c--checkvalid): VOUT: no such vector.

(VOUT is my voltage probe.)

All my devices have Spice models. I don't have spaces in any filenames (a common problem according to Mr G).

My netlist and output follow.

Grateful for any clues.

Regards - Philip

* SpiceNetList
* 
* Exported from FilterTest.sch at 30/10/2019 22:35
* 
* EAGLE Version 9.5.0 Copyright (c) 1988-2019 Autodesk, Inc.
* 
.TEMP=25.0

* --------- .OPTIONS ---------
.OPTIONS ABSTOL=1e-12 GMIN=1e-12 PIVREL=1e-3 ITL1=100 ITL2=50 PIVTOL=1e-13 RELTOL=1e-3 VNTOL=1e-6 CHGTOL=1e-15 ITL4=10 METHOD=TRAP SRCSTEPS=0 TRTOL=7 NODE

* --------- .PARAMS ---------

* --------- devices ---------
X_IC1 N_1 N_1 VBIAS SUPPLY N_20 N_26 VOUT N_2 N_2 VBIAS 0 N_5 N_42 N_42 TL084x4 
X_J5 SUPPLY 0 0 0 0 USBSupply 
X_J1 N_3 N_6 0 N_3 N_6 StereoIn 
R_R12 SUPPLY LED 2.2k 
R_R2 N_5 VBIAS 22k 
C_C2 N_4 N_5 8.2n 
X_VR1 N_26 N_20 N_7 POT_10k 
R_R1 N_4 N_42 1k 
C_C1 N_7 N_4 68n 
R_R103 N_26 VOUT 10k 
R_R10 SUPPLY VBIAS 22k 
R_R3 0 N_6  1Meg 
R_RIN N_3 N_20 10k 
D_D1 0 LED DMOD 
R_R11 VBIAS 0 22k 
C_C11 VBIAS 0 100uF 
C_C10 SUPPLY 0 100uF 

* --------- models ---------

* model file: C:/Users/Philip/Documents/EAGLE/spice/TL084x4.mdl
* BEGIN SPICE MODEL TL084
.SUBCKT TL084x4 OUT1 IN1M IN1P VCC IN2P IN2M OUT2 OUT3 IN3M IN3P VEE IN4P IN4M OUT4 
* have to match order in model below: +IN -IN +V -V OUT
X1 IN1P IN1M VCC VEE OUT1 TL084
X2 IN2P IN2M VCC VEE OUT2 TL084
X3 IN3P IN3M VCC VEE OUT3 TL084
X4 IN4P IN4M VCC VEE OUT4 TL084
* TL084 OPERATIONAL AMPLIFIER "MACROMODEL" SUBCIRCUIT
* CREATED USING PARTS RELEASE 4.01 ON 06/16/89 AT 13:08
* (REV N/A)      SUPPLY VOLTAGE: +/-15V
* CONNECTIONS:   NON-INVERTING INPUT
*                | INVERTING INPUT
*                | | POSITIVE POWER SUPPLY
*                | | | NEGATIVE POWER SUPPLY
*                | | | | OUTPUT
*                | | | | |
.SUBCKT TL084    1 2 3 4 5
*
  C1   11 12 3.498E-12
  C2    6  7 15.00E-12
  DC    5 53 DX
  DE   54  5 DX
  DLP  90 91 DX
  DLN  92 90 DX
  DP    4  3 DX
  EGND 99  0 POLY(2) (3,0) (4,0) 0 .5 .5
  FB    7 99 POLY(5) VB VC VE VLP VLN 0 4.715E6 -5E6 5E6 5E6 -5E6
  GA    6  0 11 12 282.8E-6
  GCM   0  6 10 99 8.942E-9
  ISS   3 10 DC 195.0E-6
  HLIM 90  0 VLIM 1K
  J1   11  2 10 JX
  J2   12  1 10 JX
  R2    6  9 100.0E3
  RD1   4 11 3.536E3
  RD2   4 12 3.536E3
  RO1   8  5 150
  RO2   7 99 150
  RP    3  4 2.143E3
  RSS  10 99 1.026E6
  VB    9  0 DC 0
  VC    3 53 DC 2.200
  VE   54  4 DC 2.200
  VLIM  7  8 DC 0
  VLP  91  0 DC 25
  VLN   0 92 DC 25
.MODEL DX D(IS=800.0E-18)
.MODEL JX PJF(IS=15.00E-12 BETA=270.1E-6 VTO=-1)
.ENDS
* END SPICE MODEL TL084
.ENDS TL084x4


* model file: C:/Users/Philip/Documents/EAGLE/spice/POT_10k.mdl
********************************************
* Autodesk EAGLE - Spice Model File
* Date: 9/25/17
* Variable resistor PIN1 ---/\/\/\/\--- PIN2
*                               |
*                              PIN3
********************************************
.subckt POT_10k 1 2 3
.param VAL=10K
.param VAR=50
R1 1 3 {val*var/100}
R2 3 2 {val-val*var/100}
.ends POT_10k


* model file: C:/Users/Philip/Documents/EAGLE/spice/DMOD.mdl
**********************
* Autodesk EAGLE - Spice Model File
* Date: 9/17/17
* basic diode intrinsic model
**********************
.MODEL DMOD D


* model file: C:/Users/Philip/Documents/EAGLE/spice/USBSupply.mdl
*
.SUBCKT USBSupply 1 2 3 4 5
R1 2 5 100MEG
R2 3 5 100MEG
R4 4 5 100MEG
VSUPPLY 1 5 DC 5
.ENDS


* model file: C:/Users/Philip/Documents/EAGLE/spice/StereoIn.mdl
*
.SUBCKT StereoIn L LSw RSw R Ret
VLeft L Ret AC 0.01
VRight R Ret AC 0.01
*VLeft L Ret DC 2.5
*VRight R Ret DC 2.5
R1 LSw L 1G
R2 RSw R 1G
R3 VLeft Ret 1G
R4 VRight Ret 1G
.ENDS


* --------- simulation ---------

.control
set filetype=ascii
AC Dec 500 100 10000 
write FilterTest.sch.sim V(VOUT)
.endc


.END

Warning: v.x_j1.vright: has no value, DC 0 assumed
Warning: v.x_j1.vleft: has no value, DC 0 assumed
Warning: singular matrix:  check nodes v.x_j1.vright#branch and v.x_j1.vright#branch

Note: Starting dynamic gmin stepping
Trying gmin =  1.0000E-003 Note: One successful gmin step
Trying gmin =  1.0000E-004 Note: One successful gmin step
Trying gmin =  1.0000E-005 Note: One successful gmin step
Trying gmin =  1.0000E-006 Note: One successful gmin step
Trying gmin =  1.0000E-007 Note: One successful gmin step
Trying gmin =  1.0000E-008 Note: One successful gmin step
Trying gmin =  1.0000E-009 Note: One successful gmin step
Trying gmin =  1.0000E-010 Note: One successful gmin step
Trying gmin =  1.0000E-011 Note: One successful gmin step
Trying gmin =  1.0000E-012 Note: One successful gmin step
Warning: singular matrix:  check nodes v.x_j1.vright#branch and v.x_j1.vright#branch

Warning: Dynamic gmin stepping failed

Circuit: * spicenetlist

Reducing trtol to 1 for xspice 'A' devices
Doing analysis at TEMP = 0.000000 and TNOM = 27.000000


AC operating point failed -

Last Node Voltages
------------------

Node                                   Last Voltage        Previous Iter
----                                   ------------        -------------
x_ic1.x1.11                                0.345441          0.000227187 *
x_ic1.x1.12                                0.345453           0.00022719 *
x_ic1.x1.6                            -1.53203e-009                    0
x_ic1.x1.7                                  2.50001                    0 *
n_1                                         2.50001        -4.31056e-013 *
x_ic1.x1.53                                     2.8        -8.64577e-018 *
x_ic1.x1.54                                     2.2         8.64578e-018 *
x_ic1.x1.90                            7.98445e-009         3.23117e-027
x_ic1.x1.91                                      25        -8.66829e-018 *
x_ic1.x1.92                                     -25         8.66829e-018 *
supply                                            5             -0.00078 *
x_ic1.x1.99                                     2.5                    0 *
x_ic1.x1.10                                 2.10142         -0.000259377 *
vbias                                           2.5        -8.62112e-013 *
x_ic1.x1.9                                        0                    0
x_ic1.x1.8                                  2.50001                    0 *
x_ic1.x2.11                                0.338344           0.00022584 *
x_ic1.x2.12                                0.355848          0.000229102 *
x_ic1.x2.6                                 0.493799                    0 *
x_ic1.x2.7                                   1.5638         7.59321e-016 *
vout                                        1.56427         -0.000121081 *
x_ic1.x2.53                                     2.8        -8.66796e-018 *
x_ic1.x2.54                                     2.2          0.000121081 *
x_ic1.x2.90                             -0.00313508         3.23117e-027 *
x_ic1.x2.91                                      25        -8.66829e-018 *
x_ic1.x2.92                                     -25         8.66829e-018 *
x_ic1.x2.99                                     2.5        -7.59321e-016 *
x_ic1.x2.10                                 1.14426         -0.000259942 *
n_26                                        1.54906         -4.3106e-013 *
n_20                                        1.53386        -4.31032e-013 *
x_ic1.x2.9                                        0                    0
x_ic1.x2.8                                   1.5638                    0 *
x_ic1.x3.11                                0.345441          0.000227187 *
x_ic1.x3.12                                0.345453           0.00022719 *
x_ic1.x3.6                            -1.53207e-009                    0
x_ic1.x3.7                                  2.50001                    0 *
n_2                                         2.50001        -4.31056e-013 *
x_ic1.x3.53                                     2.8        -8.64577e-018 *
x_ic1.x3.54                                     2.2         8.64578e-018 *
x_ic1.x3.90                            7.98445e-009         3.23117e-027
x_ic1.x3.91                                      25        -8.66829e-018 *
x_ic1.x3.92                                     -25         8.66829e-018 *
x_ic1.x3.99                                     2.5                    0 *
x_ic1.x3.10                                 2.10142         -0.000259377 *
x_ic1.x3.9                                        0                    0
x_ic1.x3.8                                  2.50001                    0 *
x_ic1.x4.11                                0.345441          0.000227187 *
x_ic1.x4.12                                0.345453           0.00022719 *
x_ic1.x4.6                             -1.5151e-009                    0
x_ic1.x4.7                                  2.50001                    0 *
n_42                                        2.50001        -4.31056e-013 *
x_ic1.x4.53                                     2.8        -8.64577e-018 *
x_ic1.x4.54                                     2.2         8.64578e-018 *
x_ic1.x4.90                            1.04845e-008        -3.23117e-027
x_ic1.x4.91                                      25        -8.66829e-018 *
x_ic1.x4.92                                     -25         8.66829e-018 *
x_ic1.x4.99                                     2.5                    0 *
x_ic1.x4.10                                 2.10142         -0.000259377 *
n_5                                             2.5        -4.31056e-013 *
x_ic1.x4.9                                        0                    0
x_ic1.x4.8                                  2.50001                    0 *
n_3                                         1.51866                    0 *
n_6                                         1.51866                    0 *
x_j1.vleft                                  1.51714                    0 *
x_j1.vright                                 1.51714                    0 *
led                                               5        -1.08354e-016 *
n_4                                         2.50001                    0 *
n_7                                         1.54146                    0 *
h.x_ic1.h.x4.hlim#branch              -2.10189e-020                    0
v.x_ic1.v.x4.vlim#branch               1.04845e-011                    0 *
h.x_ic1.h.x3.hlim#branch              -1.60189e-020                    0
v.x_ic1.v.x3.vlim#branch               7.98445e-012                    0 *
h.x_ic1.h.x2.hlim#branch               6.27016e-015                    0
v.x_ic1.v.x2.vlim#branch              -3.13508e-006                    0 *
h.x_ic1.h.x1.hlim#branch              -1.60189e-020                    0
v.x_ic1.v.x1.vlim#branch               7.98445e-012                    0 *
v.x_j1.vright#branch                        1.51879                    0 *
v.x_j1.vleft#branch                        -1.51879                    0 *
v.x_j5.vsupply#branch                    -0.0102263                    5 *
v.x_ic1.v.x4.vln#branch                   -2.5e-011                   25 *
v.x_ic1.v.x4.vlp#branch                   -2.5e-011                   25 *
v.x_ic1.v.x4.ve#branch                 3.00019e-013                  2.2 *
v.x_ic1.v.x4.vc#branch                 2.99998e-013                  2.2 *
v.x_ic1.v.x4.vb#branch                -1.51507e-014                    0
v.x_ic1.v.x3.vln#branch                   -2.5e-011                   25 *
v.x_ic1.v.x3.vlp#branch                   -2.5e-011                   25 *
v.x_ic1.v.x3.ve#branch                 3.00019e-013                  2.2 *
v.x_ic1.v.x3.vc#branch                 2.99998e-013                  2.2 *
v.x_ic1.v.x3.vb#branch                -1.53205e-014                    0
v.x_ic1.v.x2.vln#branch               -2.49969e-011                   25 *
v.x_ic1.v.x2.vlp#branch               -2.50031e-011                   25 *
v.x_ic1.v.x2.ve#branch                -4.65527e-006                  2.2 *
v.x_ic1.v.x2.vc#branch                 1.23574e-012                  2.2 *
v.x_ic1.v.x2.vb#branch                 4.93799e-006                    0 *
v.x_ic1.v.x1.vln#branch                   -2.5e-011                   25 *
v.x_ic1.v.x1.vlp#branch                   -2.5e-011                   25 *
v.x_ic1.v.x1.ve#branch                 3.00019e-013                  2.2 *
v.x_ic1.v.x1.vc#branch                 2.99998e-013                  2.2 *
v.x_ic1.v.x1.vb#branch                -1.53205e-014                    0
a$poly$e.x_ic1.e.x4.egnd#branch_1_0        -3.88493e-007                    0 *
a$poly$e.x_ic1.e.x3.egnd#branch_1_0         -3.8849e-007                    0 *
a$poly$e.x_ic1.e.x2.egnd#branch_1_0          1.8137e-006                    0 *
a$poly$e.x_ic1.e.x1.egnd#branch_1_0         -3.8849e-007                    0 *

doAnalyses: matrix is singular

ac simulation(s) aborted
Error(parse.c--checkvalid): VOUT: no such vector.
Note: No ".plot", ".print", or ".fourier" lines; no simulations run

jorge_garcia · ‎10-31-2019

Hi @Anonymous ,

I hope you're doing well. There's a few things that could be going on the error messages are often less than helpful. First, make sure that all of pins are connected to something. Even if you are not using a certain gate you have to put some nets on those pins. Usually just a short net stub that goes nowhere is sufficient.

Another thing you can try is if you have a lot of capacitors for AC coupling, in the simulation setup make sure RSHUNT is set to ON. Let's start there and see if we can get anywhere.

Let me know if there's anything else I can do for you.

Best Regards,

Jorge Garcia
Product Support Specialist for Fusion 360 and EAGLE

Kudos are much appreciated if the information I have shared is helpful to you and/or others.

Did this resolve your issue? Please accept it "As a Solution" so others may benefit from it.

Anonymous · ‎11-03-2019

Hi Jorge -

Thanks for your suggestions, but I'm still struggling with this. It's gotta be something trivial but it's hiding from me pretty well.

I've double-checked and all pins of all devices are connected. In particular, as you can see from the netlist, VOUT (the thing it's complaining about) is connected to X_IC1 (an output of opamp TL084x4) and also to R103, the other end of which goes to the same opamp's inverting input. And under Node Voltages, vout is given as 1.11023. So I don't understand why it's saying VOUT: no such vector.

Turning on RSHUNT made no difference, and I've deleted and recreated the voltage probe (VOUT) with no effect. Clearly there's some stupid problem hiding in plain sight. The further benefit of your wisdom would be greatly appreciated.

Anonymous · ‎11-05-2019

For the benefit of anyone arriving here from their favourite search engine, I posted the same question to the NGSPICE forum on Sourceforge and got the answer.

The "no such vector" was a secondary error. I should have been paying more attention to the previous message

Warning: singular matrix: check nodes v.x_j1.vleft#branch and v.x_j1.vleft#branch

As a warning rather than an error, and since I didn't know what a singular matrix was, I passed it over. I shouldn't have! Clearly, a singular matrix can really spoil your day.

The root of the problem was that I'd copied and pasted the stereo input jack from my full schematic but in the process had lost the pin mapping. This resulted in the two voltage sources (for the left and right channels) being shorted together. Shorting two voltage sources together (especially perfect voltage sources) is always a Bad Idea, and resulted in metaphorical smoke coming out of NGSPICE.

Hey ho. At least it wasn't my physical circuit board that went up in smoke!

rachaelATWH4 · ‎11-05-2019

@Anonymous wrote:

Shorting two voltage sources together (especially perfect voltage sources) is always a Bad Idea, and resulted in metaphorical smoke coming out of NGSPICE.

Hey ho. At least it wasn't my physical circuit board that went up in smoke!

"Metaphorical smoke". This did make me chuckle 😄

I'm glad you were able to get to the bottom of the issue. Thanks for posting up the answer on here so others can benefit from your experience!

Best Regards,

Rachael

Anonymous · ‎11-05-2019

Sounds like an apt discussion for April 1st: how to model the emission of smoke in a Spice model. To be really useful it'd have to be parameterised by colour, density and smell, possibly with the option of adding flames. And while we're at it, perhaps we could do with a Spice model for an electrolytic to simulate the explosion when you connect it the wrong way round. I remember, some early microprocessors did implement the so-called HCF instruction (Halt and Catch Fire - due to the fact that the designers couldn't afford enough gates to fully decode the instruction opcode).

Better stop there before I get flamed (metaphorically, of course) for taking this thread off-topic.

rachaelATWH4 · ‎11-05-2019

@Anonymous wrote:
Sounds like an apt discussion for April 1st: how to model the emission of smoke in a Spice model. To be really useful it'd have to be parameterised by colour, density and smell, possibly with the option of adding flames. And while we're at it, perhaps we could do with a Spice model for an electrolytic to simulate the explosion when you connect it the wrong way round.

I think this idea has legs! Maybe Jorge or Edwin will take note and it can be added into a special April 1st release! 😄

@Anonymous wrote:

I remember, some early microprocessors did implement the so-called HCF instruction (Halt and Catch Fire - due to the fact that the designers couldn't afford enough gates to fully decode the instruction opcode).

Ah yes, I remember that. Also the TV show by the same name which was awesome and I am going to have to go back and rewatch now you've reminded me of it 😄

Best Regards,

Rachael

Anonymous · ‎11-09-2019

For the sake of anyone else finding this thread, a similar error popped up again and had me scratching my head for several days. This time it was incredibly simple once I found it - I had a voltage probe with a hyphen in the name (OUT-L). It was complaining about no such vector OUT, which puzzled me. Changed the hyphen to an underscore and all is well again!

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&quot;no such vector&quot; running Spice