Files for "Bed of Nails" or other board tests

[Anonymous]

Hi all

We're designing a reasonably complex board using Eagle with 16 layers, blind and buried vias and small gaps between traces (down to 4 mils).  As a result, we'll be wanting the board manufacturer to do a "bed of nails" or other test to ensure that the board is good before we stuff parts onto it.

How do I make the appropriate files for the manufacturer using Eagle?

Thanks.

[Anonymous]

I think in-circuit testing can be done with a CAD file and schematics.

What you need is a "gencad" ULP which will run from the board editor and generate a 'project.CAD' file for you.

One of these should work: http://eagle.autodesk.com/eagle/ulp?utf8=✓&q[title_or_author_or_description_cont]=gencad

[aholtzma]

All of the board testers I know of can generate this data from the gerbers and drill file. Ask your board shop about it.