Thanks for the long reply Greg and the passion you have for getting this right! And rest assured, none of us on the team at Autodesk are looking to make missteps with layers! Likewise, I understand your concerns and I want to stress that we are going to tread extremely lightly with layers, selection, visualization, etc.
Across the team, we have probably 200 years of PCB design / PCB-SW experience (having designed literally thousands of PCBs myself going back to Tango / Master Designer) and when forming the team, we sought people with MUCH more than simply generalist graphics-SW experience. Virtually the whole of the team is CID certified & many have advanced degrees in EE, CE or the like. Point being: we come from industry and we formed this team deliberately to ensure we advance EAGLEs capabilities in the right way. It is far more expensive to Autodesk to get this wrong!
Now I want to start by sharing an image and I'll come back to this later. Just have a look and I'll revisit this in a second...

Much of what you indicate in your post seems related to the ordering of signal layers and I agree with you 100% about the specific ordering of these. You chose these layers for a reason, the layer stackup definition in the DRC dialog defines this sequence, and how we represent these in the layer stackup is critical. I have done countless wireless boards and high power, HDI, etc and know the issues here intimately.
My comment about layers not making sense is that there is NEVER a scenario where top soldermask and bottom soldermask are adjacent to one another, however in EAGLE they are, in terms of the enumeration of layers. This is in fact NOT a reflection of your board or your stackup at all, but instead something EAGLE has accepted as fact because it made layer "pairs" easier to manage internally (flipping from A to B is easier if A is adjacent to B in the enumeration of the layers). The comment about this all getting sorted in CAM is largely true because people tend towards README files and a layer stackup in Gerber or worse still, in file extensions to define the layer ordering. In PCB, it's only valid because of the drawing order and not the data model.
So you're correct that layer ordering for signal layers in not ambiguous, however it is also not consistent with the ordering of non-signal layers and worse still, the lack of discipline in non-signal layers has created a long history of confusion and lack of consistency that at some stage, would be nice to resolve.
Take as a case in point the issue of loading library parts from 3rd party libraries. You may never do this, but many, many users DO. And when this occurs, layers are introduced into user designs that are often unexpected or worse still, may be dual-purposed for something completely different than what the person using the library had intended. This is not the heart of the issue though, just collateral damage from a lack of structure and I suppose on the upside, the 'flexibility' that affords users.
To the point I was making earlier, the layers in EAGLE are in fact ambiguous in multiple occasions and in fact, your CAM exports and the way you mark up the PCB with notes, etc. are all a reflection of this. It's been this way since the days on Master Designer running on a DOS machine with a stack of dongles half a foot long and it still persists today.
WRT to changing selection, there is perhaps some confusion on a number of fronts and I want to be 100% clear on a few things:
1) Changing your ability to select and move an object has nothing to do with it's reference point. That is simply the X:Y origin of the object and enabling you to move the object to an explicit location doesn't depend on whether when you click the outline of the object, it becomes selected.
2) (And perhaps the most controversial)...99% of the time, the assembly house throws away any pick and place data you've generated and maps parts to the library appropriate for their machine (whether Juki, Universal, Samsung, Yamaha, etc). So though that "plus sign" is essential for your accurate placement of the part in the PCB (see item #1), it has zero influence in the downstream assembly process. I know this sounds overblown but I would ask anyone to contact your assembly house and take a tour if you question my numbers. Keep in mind: the assembly house is in the business of building your board with their machine and thus they have a much bigger stake in getting you and every other customer the right boards back. This is what drove - in part - the IPC standards for land patterns (specifically orientation, fiducials, pin-one handling, silkscreen markers, etc) and every machine mfg has a library of parts they use to map to their equipment.
3) (Here's where I buried the lead!) Selection and viewing the current layer in the view window are different than processing your board layers and the order in which things are constructed. Now, see image above. The visual queues are super important - we get this - and we should preserve your layer drawing order, however go back to EAGLE version 7 and try this (as I did in the image): Route a track on the bottom layer. Now move the track over some top layer segments. What is being drawn on top? In fact, the top layer tracks will appear beneath the bottom layer segment while routing. The same holds true any time you change layers. The current layer always takes priority in the view window. It always has. And that behavior is something which having a Current Active Layer simply extends to work without being buried in a command.
When selection changes (and it's coming...just not yet) the question becomes: how to prioritize what you want selected? Surely if you had explicitly enabled tNames as the Current Active Layer, you would want to move the text, rather than a bottom layer polygon, no? Or the text in schematic rather than a Frame, no?
So the question crops up -- when you enable direct selection, where do you give the user the ability to control the layer priority? And again, this has nothing to do with the actual construction of the board. This is about selection ordering and hit testing which is what I'd hoped to emphasize in my earlier post.
We can certainly give you the ability to view the board only in the layer order that you specify, but keep in mind, you havent been viewing it this way in the past (as the picture shows) 100% of the time. Thus we need to separate the confusion of viewing, selection and construction. These are strongly related concepts but they are in fact NOT the same concept as there is precedent for when these things have been violated in the past. Point being, it's hardly sacrosanct and would change EAGLE's behavior for the worse if we changed this since things would be obscured during interactive operations.
What IS confusing - and I totally take the point - is that this Current Active Layer drawing creeped in somewhat unannounced and that's a faux pas we wont be making again. And we can add the ability to more strictly prioritize the layer ordering. (Again, already having said that an as-built view is something we can support).
So I hope this helps clarify some of my early points. I wasnt trying to inject controversy but rather just highlight that there are reasons for the changes we've made and they are rooted in more than 'whimsy'. Every line of code we write comes at a real cost so we don't look to make changes unless there is something planned (or in some rare cases, a bug changes behavior but obviously this is something we'd fix rather than try and rationalize...not much room for 'random' in a roadmap! 🙂
Best regards,
Matt
@Anonymous wrote:
Sorry for the wall of text, but I'm got reservations about the way these new features have been presented in the previous message, and it makes me worry about what Autodesk is doing to Eagle. I'm going to try to present this in my somewhat humerous tone, but the whole email about layers and whatnot in the previous message demonstrates an apparent deep lack of understanding of what exactly Layers and Part Centers mean in PCB design.
Electrical Design is VERY different from other layered-interface type products. Layers in PCB layout software basically defines the Z-Axis of the design. I've worked in large AutoCAD environments, and in that case the variability of layers is used to _show different data to users_ but are generally not _integral to the the design_. For example, in AutoCAD I can make a layer for "fencing" and a layer for "plumbing" and a layer for "property lines" and select them to present data in a way that is handy to the user to make drawings. They are primarily _visualization_ tools in model space, to make complex things easier to understand. I can turn on and off the "plumbing" layer and the "fencing" layer and the "property line layer". I can even move them up and down in a list, or sort them for display. However, if the "fencing" layer is below the "plumbing" layer in AutoCAD, it's not likely that the Fencing contractor will see that drawing and start digging a trench to bury their fence. In PCB fabrication, that's exactly what happens, as the layer stackup is literally a definining element of PCB design.
PCB fabrication is mainly 2D, with wires passing over each other on pre-determined layers that are physically placed on top of eachother during fabrication of the boards. The order in which those pre-determined layers are stacked is determined by the Layers in Eagle: Meaning the layers in Eagle are actually defining the 3D (Z-axis) geometry of the printed circuit board. When I send a design to my fabricator, and I say I want THIS on the bottom, THIS NEXT THING on the next layer, and so on up the stack, that is _exactly_ what I want. If I got PCBs back and I found out that my shop flipped layer 4 and layer 9 in the fabrication process, I would be livid, as that can have catastrophic results.
Those layers were put there, in that order, as I had a Ground plane here, and a Power plane there, and a signal plane there, and that signal plane has an RF stripline on it that needs to be adjacent to the ground plane exactly two layers away (etc etc etc) for my circuit to work. If you flip those around, it's not gonna work, and I'm going to end up spending hours with my RF gear losing my mind trying to figure out why my stripline has the wrong impedance.
You say that "how layers are defined [...] and rendered are [...] completely ambiguous or unintuitive" and that "[as-built view] . . . would prove useful.. but consider even *that* is misleading until you get to CAM". No.
No it isn't. No they aren't. They aren't misleading or ambiguous at all. It's designed that way on purpose, and is there for a reason.
The view of a PCB, with the layer stackup I want, is exactly what I want, in that order, and that order only. Any other order of layers is not what I want. The top HAS to be on the TOP and the bottom MUST be on the bottom, and the stuff in between NEEDS to be in EXACTLY that order, top to bottom. This is why the "active layer" concept you talk about is deeply flawed for PCB layout software, since it assumes that PCB layers are just representations of data for visualization. Which it isn't. If I'm adding some ludicrous-long "Oh boy, this isn't a good idea but I've got no other options" trace across a board that mixes RF, high voltage DC, and all the rest, I'm going up and down between a huge stack of layers, and the relationship between those layers is very important. I don't want to route immediately under that Stripline, for example, as then my little trace will pick up RF and stop working, so I need to put a ground plane in between that and my signal. (For some Excellent and Funny Stories about this kind of thing, go check out the archived Reddit thread from Bil Herd and Dave Haynie (https://www.reddit.com/r/c128/comments/682da4/c128_ama_from_bil_herd/))
This is maybe why you see the current layering as as "too ambiguous" and "wrong from the outset", as it seems like you are seeing them only as visualization aids, rather than an extremely important part of the design. tPlace and bPlace are geometric definition layers, which have the X and Y centers of the parts, and are generally used directly in outputting CAM data. Since you can (generally) only put physical solderable things on the top and bottom of a board, then, well, that's why they are adjacent. You can't really have a "23Place" layer in between layer 22 and 24, as you can't (as of now) easily laminate SMT packages inside PCBs. tNames and bNames are the same thing: Those get turned into silkscreen data output by the Cam processor (generally), and it wouldn't make any sense to print a silkscreen in the middle layer of a 48 layer board. So, if you consider that the layering order has a _direct influence_ on the way the boards are fabricated, then maybe it will seem more intuitive to you. Same thing for other layers (Paste, Keepout, etc). You don't want the Paste layer put in the middle of the stackup, as, well, that's no place for solder paste. Indeed, there are tons of other layers that are pretty arbitrary, and a lot of this is set up in the CAM processor, but the point is that even those arbitrary layers are _just as important_ to a PCB layout designers that assigned them as the 3D axis is to a designer working in Fusion.
An analogy for 3D Fusion type software would be to have the active surface you are editing always automatically pop in front of everything else. That would clearly be silly, and would irritate people to no end, since you put that face on the "back" of that part for a good reason, and you put that other thing on the "front" for another good reason. If I want to edit that face, I'll select it and edit it. Fusion has a great way to select active surfaces and all that, but it doesn't just "pop the surface to the front when you select it".
Another way to think of this is that PCB designers can't easily specify a "Z-Axis" for electrical routes, except through layers of PCB. As an example, if I have 2 pads that overlap, I can't just skootch one up by a few mils, and have it be OK, as it doesn't make physical sense unless I'm doing super-fancy fab with resisters and stuff built into the substrate, or adding another layer. Even then, you can't arbitrarily make one resistor "thicker" than another on the same layer, so even then, you gotta skoot it to a different layer, and once again, that layer has to be there, and always there, and only always there.
As for the component selection, I don't know exactly what "modal or non-modal select" means, but I do know that I love my Center Plus Signs. It's a Direct Connection between the package and where the machine will put the part when I get them built. I've been doing PCBs for about 15 years now, and I've never had an engineering reason to align the edge of an 0805 component to a midpoint of another edge of an adjacent 64-pin LQFP. However, that sort of thing happens _constantly_ in mechanical CAD software.
The reason I haven't ever done that is because of part tolerances: Nearly all part datasheets I've ever seen specify pad spacing within a few 0.05mm or so, whereas even common LQFP type parts have their _plastic overmolded packages_ (or total outline size) specified within much looser (0.5mm or greater) tolerances. The higher the pin density, the bigger this difference gets. Pad spacing is the controlled element of nearly all electrical components. The block epoxy of chips is just there to keep in the magic smoke, and is usually not nearly as close in accuracy as the lead frames are. Adding in a bunch of edge align / side align / whatever type tools to PCB layout is not particuarly useful, as if you use them, and then convert to the known datum for the part defined in the library, then you'll be giving your Optical Inspection People at the factory spastic stress headaches, since they'll see the datums on the part of the chip defined as the "center" or "zero" or fiducial in the data sheet skooting around based on the package tolerance. I know this, as I've seen this happen. This is generally why Optical Inspection stuff looks at _pins and pads_ and _not_ packages, and why X-Ray inspection for BGA's is a big deal: You can't trust the carrier of a component is aligned _exactly_ where it needs to be. So, that's why I trust and savor my little plus signs in Eagle.
The selection of those little plus signs works out really well for me, and I really honestly do NOT want something arbitrarily grabbing signals and stuff for me. I also use a lot of "move U3" style commands or "show SIGNAL_NAME" rather than pointing and clicking.. On really dense boards, no matter how flashy and magical your automatic intuitive selector thing is, it's _always_ going to get confused if you're trying to select one net out of some multiple-hundred ratsnest catastrophe you're trying to make sense of. There's just no way to figure out what the user was "intending" unless that person types "SHOW or ROUTE THIS_PARTICULAR_SIGNAL_I_WANT_TO_ROUTE".
A clever software solution I've always wanted would be to introduce your slick and intuitive magic into the concept of busses, so I could type something like ROUTE BUS BUS_NAME, since generally when people do schematic design, they tend to use Busses in rational ways: You're not likely to see BUZZING_ANGRY_HIGH_VOLTAGE_SIGNAL in the same bus as NANOVOLT_FEEDBACK, as usually those types of things aren't aligned in the world of doing electronics designs.
Eagle seems complicated to newcomers because PCB layout is complicated. If you want to 3D print a dinner plate with Fusion360, you can sort of mess around and follow tutorials and end up with something that looks like you want: A plate. But in PCB design, the limitations in Eagle are (partially) there because of physical constraints. You can't just arbitrarily route between points, as you can't cross anything on the same layer. You need to set up your packages right, or else your solder pads won't line up with the parts you just bought, and on and on and on. There's a lot to learn to do this stuff well.
Knowing this, I put a lot of effort into getting my Library elements to be pretty solid: I generally make the pads, paste, silk screen, keepouts, and whatever else is required for a particular part from the manufacturer's data sheets or standard practice, and design everything off the center of the parts, packing things as close as I can electrically while keeping things out of eachothers' keepouts. This means that (1) The parts will always fit when stuck down by a pick'n'place, and (2) I have enough clearance to allow for proper soldering or glue-dotting or whatever else. And (3) it means that by making those choices, the built in DFM checks can easily spot errors (overlap, clearance, etc).
I've found that Eagle's general constraints on use makes it relatively hard to fabricate a PCB that comes out being a short-circuited mess, as it makes you look things up to keep from doing things that turn your PCB into a solid block of copper. That same thing is why it's seen as "hard to use". I think this could be fixed by nice tutorials and such, rather than more effort in more intuitive doodaddery inside the software.
Cheers,
-Greg