Hello,
We are making multi-layer PCB in eagle ver. 7.2. We defined 6 layer PCB with buried vias between 2-5 layers. This via should have
diameter 0.5mm on its outer layers (those are 2,5 layers) and 0.3mm on its inner layers (those are 3,4 layer). In properties of via Eagle
shows outer and inner diameter correctly, but all diameters are set as 0.3mm. It seems that Eagle takes outer layer as always 1 and 6.
This is true only for vias 1-6. Burried via diameters should be treated differently. Start and end of that via should be treated as outer, and
rest as inner diameters.
This bug is still present in ver. 8.4.
I look forward to hearing from you.
Best regars,
Mateusz Spychała
Solved! Go to Solution.
Hello,
We are making multi-layer PCB in eagle ver. 7.2. We defined 6 layer PCB with buried vias between 2-5 layers. This via should have
diameter 0.5mm on its outer layers (those are 2,5 layers) and 0.3mm on its inner layers (those are 3,4 layer). In properties of via Eagle
shows outer and inner diameter correctly, but all diameters are set as 0.3mm. It seems that Eagle takes outer layer as always 1 and 6.
This is true only for vias 1-6. Burried via diameters should be treated differently. Start and end of that via should be treated as outer, and
rest as inner diameters.
This bug is still present in ver. 8.4.
I look forward to hearing from you.
Best regars,
Mateusz Spychała
Solved! Go to Solution.
Solved by jorge_garcia. Go to Solution.
Hello Jorge,
Thank you for your help. I'm afraid that we defined layers correctly. Our settings are:
[3:(1+(2+(3*4)+5)+16):4]
That means we can create following types of VIAS.
1. Through hole
2. Micro via layer 1-2
3. Micro via layer 2-3
4. Micro via layer 4-5
5. Micro via layer 5-16
6. Buried via layer 3-4
7. Buried via layer 2-5.
There is no problem with vias types 1-5. Problem we have with VIA types 6 and 7.
E. g. for buried via (layers 2-5) there are 4 annual rigs generated.
On layers 2,3,4,5. And all of them are treated as inner layers annual ring (small one).
Problem is that, layers 2 and 5 for this type of buried via should be treated as outer
layer, because in manufacturing process this via is drilled when there is no layers 1 and 6 put together.
Manufacturer demands that this buried via should have bigger annual ring.
I hope this time I made is clear.
Best regards,
Mateusz Spychała
Hello Jorge,
Thank you for your help. I'm afraid that we defined layers correctly. Our settings are:
[3:(1+(2+(3*4)+5)+16):4]
That means we can create following types of VIAS.
1. Through hole
2. Micro via layer 1-2
3. Micro via layer 2-3
4. Micro via layer 4-5
5. Micro via layer 5-16
6. Buried via layer 3-4
7. Buried via layer 2-5.
There is no problem with vias types 1-5. Problem we have with VIA types 6 and 7.
E. g. for buried via (layers 2-5) there are 4 annual rigs generated.
On layers 2,3,4,5. And all of them are treated as inner layers annual ring (small one).
Problem is that, layers 2 and 5 for this type of buried via should be treated as outer
layer, because in manufacturing process this via is drilled when there is no layers 1 and 6 put together.
Manufacturer demands that this buried via should have bigger annual ring.
I hope this time I made is clear.
Best regards,
Mateusz Spychała
I believe I've run into this bug, and it's still present in 8.6.3. The problem is that Eagle doesn't properly generate the minimum Annular ring width for buried vias. I've attached a simple example. I set up DRC according to the pictures below - as you can see, both through and buried vias should have minimum 0,3 mm annular ring width. But when you actually create the vias with Route, the buried vias are visibly thinner. However, it's not so simple. If you analyze my example closely, you will notice "Drill Size" DRC errors in the vias - they have 0,4 mm drill, but I set 0,6 mm minimum drill in DRC. When you use Change-Drill and increase the buried via diameter to 0,6 mm or greater, the annular ring suddenly jumps to a correct width. The same happens if you decrease the Minimum Drill value in DRC to 0,4 mm or lower. So, it seems the underlying problem is deeper than Route command.
I believe I've run into this bug, and it's still present in 8.6.3. The problem is that Eagle doesn't properly generate the minimum Annular ring width for buried vias. I've attached a simple example. I set up DRC according to the pictures below - as you can see, both through and buried vias should have minimum 0,3 mm annular ring width. But when you actually create the vias with Route, the buried vias are visibly thinner. However, it's not so simple. If you analyze my example closely, you will notice "Drill Size" DRC errors in the vias - they have 0,4 mm drill, but I set 0,6 mm minimum drill in DRC. When you use Change-Drill and increase the buried via diameter to 0,6 mm or greater, the annular ring suddenly jumps to a correct width. The same happens if you decrease the Minimum Drill value in DRC to 0,4 mm or lower. So, it seems the underlying problem is deeper than Route command.
"It's not a bug, it's a feature!"
Or rather, there is a bug, but with out-of-spec micro vias and not with buried vias.
In DRC->Sizes, you have set the min drill for normal vias to 0.6mm, and min micro via to 9.9mm (good). But because your 0.4mm via drill is smaller than both of these values, the DRC error appears (correctly). And Eagle still takes the 2-15 via as a micro via (questionably) and applies the anular ring of micro vias to it. As soon as you increase the drill size to 0.6 or bigger, it is taken as a normal via (without error) with your specified anular ring sizes. The other two vias are not candidates for micro vias, thus they always have the anular ring of normal vias.
Solution/workaround: Set anular ring sizes for micro vias the same as normal vias.
"It's not a bug, it's a feature!"
Or rather, there is a bug, but with out-of-spec micro vias and not with buried vias.
In DRC->Sizes, you have set the min drill for normal vias to 0.6mm, and min micro via to 9.9mm (good). But because your 0.4mm via drill is smaller than both of these values, the DRC error appears (correctly). And Eagle still takes the 2-15 via as a micro via (questionably) and applies the anular ring of micro vias to it. As soon as you increase the drill size to 0.6 or bigger, it is taken as a normal via (without error) with your specified anular ring sizes. The other two vias are not candidates for micro vias, thus they always have the anular ring of normal vias.
Solution/workaround: Set anular ring sizes for micro vias the same as normal vias.
Well, in that case, it means that Eagle (also?) incorrectly detects Microvias. Because according to the help text in the Annular Ring menu, it should detect only blind vias as Microvias, not buried vias as in my example.
But this raises another question - if the Microvias even should be limited only to blind vias. Because contemporary high-density PCBs are routinely manufactured with stacked micro vias:
I guess it depends on what Eagle programmers aimed to do...
Well, in that case, it means that Eagle (also?) incorrectly detects Microvias. Because according to the help text in the Annular Ring menu, it should detect only blind vias as Microvias, not buried vias as in my example.
But this raises another question - if the Microvias even should be limited only to blind vias. Because contemporary high-density PCBs are routinely manufactured with stacked micro vias:
I guess it depends on what Eagle programmers aimed to do...
@hanakp_BUT wrote:
But this raises another question - if the Microvias even should be limited only to blind vias. Because contemporary high-density PCBs are routinely manufactured with stacked micro vias:
I guess it depends on what Eagle programmers aimed to do...
They aren't currently limited to blind vias and I don't think they should be. I've got boards where I am doing stacked microvias and it works correctly as is. If the microvias were limited to blind only I couldn't have done my boards. I suspect its a case that the documentation needs updating rather than EAGLE being changed in this respect.
Best Regards,
Rachael
@hanakp_BUT wrote:
But this raises another question - if the Microvias even should be limited only to blind vias. Because contemporary high-density PCBs are routinely manufactured with stacked micro vias:
I guess it depends on what Eagle programmers aimed to do...
They aren't currently limited to blind vias and I don't think they should be. I've got boards where I am doing stacked microvias and it works correctly as is. If the microvias were limited to blind only I couldn't have done my boards. I suspect its a case that the documentation needs updating rather than EAGLE being changed in this respect.
Best Regards,
Rachael
Hello,
I've checked all proposed solutions and ideas and couldn't find solution.
We have defined layers as follows:
[2:[3:(1+[3:(2+(3*4)+5):4]+16):4]:5]
In my opinion outer annual rings should be there:
But in Eagle they are there:
Is this behavior correct?
Best regards,
Mateusz Spychała
Hello,
I've checked all proposed solutions and ideas and couldn't find solution.
We have defined layers as follows:
[2:[3:(1+[3:(2+(3*4)+5):4]+16):4]:5]
In my opinion outer annual rings should be there:
But in Eagle they are there:
Is this behavior correct?
Best regards,
Mateusz Spychała
Hello,
We sent our design to manufacturer and they have accepted it, so it seems that this behavior is acceptable. I don't know why they
initially sad us to make bigger "outer" rings in inner layer.
Thank you for your help.
Best regards,
Mateusz Spychała
Hello,
We sent our design to manufacturer and they have accepted it, so it seems that this behavior is acceptable. I don't know why they
initially sad us to make bigger "outer" rings in inner layer.
Thank you for your help.
Best regards,
Mateusz Spychała
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