Missing airwire and thus non-functioning PCB comes through DRC

[infoM3QTF]

Dear experts,

I'm experiencing a nasty bug that has cost us quite some time. The problem is as follows.

I've connected CPVDD to 3V3A in the schematic as shown here. I'm aware that nets can be tricky as they can seem to be connected (while they aren't really when you drag them), but here they truly are.

Nevertheless, that isn't enforced in the PCB document.

To prevent future time-loss and trouble, I've attached the design document below. Can you tell me what I've done wrong here? And what I can do to prevent this in the future?

Best regards,

Jochem

[jorge_garcia]

Hi @infoM3QTF,

I hope you're doing well. The problem here is that in Fusion, you can not connect two differently named together. A net can only have one name so the scenario you've achieved graphically is not allowed and that's why you don't see it on the board. 

With that said there are two ways to work around this. I'll use the example of connect analog ground and digital ground near the source to try to improve noise performance(the example can be debated not all experts agree that split planes should be a general practice, however it is common).

1) In the schematic keep AGND (Analog Ground) and DGND(Digital ground) as two separate nets. In the 2D PCB, overlap the 2 polygons at one point. Because the polygons have the same rank by default, they will short. This is is the simplest way to tie 2 differently named nets together in Fusion.

2) Use 0-ohm resistor or a shorting component. A shorting component can be made in the library using two pads and then shorting the pads with copper. This method is more flexible since it doesn't rely on polygons but it will create a couple of DRC errors. The other advantage here is the schematic has a stable netlist that reflects whats on the 2D PCB unlike the situation you have now.

Let me know if there's anything else I can do for you.

Best Regards,