error of stop mask

[Anonymous]

I am trying to finish my board. However, there are still more than 100 errors of stop mask (29).

If someone knows how to fix these error. Is it alright, if I ignore these errors?

Thanks,

Dawn

[Anonymous]

If you get errors, usually it is an error compared to some set of standards (dimensional values) you have loaded from a settings of a *.dru file. It may be perfectly reasonable to use such design if your design rules are set wrong, you have to check it over in the "DRC" section first and go over each of the values.

[jorge_garcia2 · Accepted solution]

Hi Dawn,

I hope you're doing well. Stop Mask errors occur whenever a non-copper layer (usually the silkscreen) touches the stop mask. Usually it means that some ink from the silkscreen will overlap the pads. This only a problem if you have very small pads because then the ink doesn't burn off and can gunk up the connection.

Without looking at the design I can't confidently say to ignore them but 90% of the time it's OK to ignore them.

Let me know if there's anything else I can do for you.

Best Regards,

[Anonymous]

But some BGA/LGA pads are defined with solder paste overlapping the solder mask, so it must be possible to define this is OK, directly at the BGA/LGA package design, am I correct?

These overlaps are usually a result of solder mask defined pad, where the pad underneath is of a good dimension, but the SMP part maker thinks it would be beneficial for the solder mask to be a little tighter.

The stencil opening is of 0.18mm diameter or something like that anyway. (look at how big it is)

[Anonymous]

Consider solder and soldering process test.
A solder stencil opening well in excess of the pad is created and the solder paste must coalesce into a nice solder bump. You can see it on some electronics mainboards. It's entirely not an error.

I have seen this used as the special pads to which test and programming pins connect, the excess of the stencil opening defines the shape and height of the bump and is thus critical.

Also not an error.

Eagle should be able to differentiate between design rules that are there because of strict manufacturing limitations (like smallest drill bit is 0.3mm and that's it), but then, there are design rules that are "just nice" or sanity, or increasing reliability.

So, you need Manufacturing rules, Project design rules and individual component design rules.

You can not go "under" manufacturing design rules, but you can, and many times go under your common sense rules at selected places.

My PCB maker has 0.15mm trace 0.15mm gap rule.

But of course, I intend as far as possible to keep at least 0.3mm trace everywhere. This, of course is broken at some places.

This is the real world and that's how it shuold work.

Instead od "DRC..." menu, we should have a new one, that would be design rules, and checking them being only a small part of that.

The personal/project design rules could also incorporate things such as grid preferences, because some projects do use some weird grid settings.

[Anonymous]

Hello,

there is a method to avoid false stop mask errors.

Stop mask errors are shown even if no connetions are routed. They generated when elements in the internal Eagle layers  21,22 (Place),25,26 (Names),27,28(Values) collide with the stop mask.

So deselect  these Layers before the design rule chack and you will not get false stop mask errors.

Dieter