Hi all
I have ruin a board because of a forgotten trace, all pcb programs has a connections check in them like ultiboard and such, in eagle I do see DRC and ERC and have delete a trace on purpose and let eagle check, he do not see that disrupted trace and says everything is fine, is this maybe a bug or not implemented.
thanks.
Solved! Go to Solution.
Solved by matt.berggren. Go to Solution.
Hi spiritman50,
Your participation on forum is greatly appreciated, sorry that you didn't catch that un-routed signal. Just to let you know, if you run ratsnest it will always report how many unrouted signals you have on your board. If anything other than zero appears, you know you have a connection that has not been routed. The reason EAGLE does not flag it as an error is because an unrouted traced is not really an error, it just an connection that has not been routed. I will place a recommendation for future version to have this come up as a warning. Sorry you didn't catch this earlier, in the meantime run Ratsnest often to be assured all signals are routed.
Best Regards,
Edwin
Please 'accept as solution' if my reply resolves your issue.
May I suggest this kind of check be implemented in the CAM processor. That way it would give you an unrouted airwire error before generating gerbers.
There is a ULP called airlist that will tell you the number and location of airwires. It's helpful for hunting down those tiny airwires stuck in the gnd pours, even though the gnd is poured over top of them.
Personally I have never liked the ERC or DRC, and tend to never use them as they show tons of irrelevant errors. It's kind of useless when you get thousands of clearance errors for traces being closer than the net class clearance coming out of fine pitch parts. Instead I would like to see a fabrication clearance matrix that the DRC primarily uses instead.
That being said, I have a few ulps that I run before generating fabrication documents that catch these kind of problems.
Best Regards,
Cameron
Kudos are much appreciated if the information I have shared is helpful to you and/or others.
Did this resolve your issue? Please accept it "As a Solution" so others may benefit from it.
FYI, this has been changed and will be in the next build, barring any major issues. 🙂 What that includes is a DRC check for airwires and any unrouted net connections.
Best regards,
Matt
Good suggestion, thank you! We are looking at a serialized output "process" (think 'Release Configuation') which would allow you to define specific checks before Gerber can be produced, so this will fit that model for sure! Thanks for the feedback!
Best regards,
Matt - Autodesk.
All this wishes can be easely implemented, and maybe even with less error detection like useless things.
It is all in the hands of the programmer, eagle is a nice software who with clever programming beat the overbloated pcb programs out there.
Please stay out of internet connections, use a dongle or such.
regards
The ULP help tools I do not like much, it make the real software child like, just implement it in eagle itself.
regards
Thanks for your reply. As mentioned, this is already in the software and will be included in the next release. 🙂
Best regards,
Matt - Autodesk.
Awesome! Was going to write up a suggestion around this (with some option to disable it for those who consider unrouted traces not errors). Can't wait.
HI spiritman50,
Here is a sneak peak at what it looks like :
Best Regards,
Ed
Thanks for the inclusion of air wires in DRC. I always run ratsnest often, but the problem used to be finding the short wires. Now it's only a double click in the DRC Errors dialog. Perfect!
There is one problem with the new function: it makes air wires for all connections covered by a polygon. You know, when laying out multilayer PCBs, we rip up the polygons all the time (I have "rat; rip @;" on an F key). Now we have to remember to run rat before each DRC, then close the dialog, rip the polygons, then open the error dialog again.
So, even if the new functionality is very good, I don't see it as complete yet, and it has slowed down my workflow quite a bit, since the process including closing and opening the dialog cannot be put on an F key (as far as I know).
If you look at the screen shot attached, none of those air wires are "real".
@aabmar wrote:
@There is one problem with the new function: it makes air wires for all connections covered by a polygon. You know, when laying out multilayer PCBs, we rip up the polygons all the time (I have "rat; rip @;" on an F key). Now we have to remember to run rat before each DRC, then close the dialog, rip the polygons, then open the error dialog again.
@can you not just have an F key that does "rat; drc; rip @;"?
I just tried this and it seems to work fine. I just did a quick test on a test board, I added a resistor with a net TEST1 which just connected its two pins together. In the layout I put this inside a polygon named TEST1 and ran ratsnest. It filled and there was no air wire. I ripped up my polygons and ran DRC, it showed as an airwire in the list as expected. I then ran the command string above and the airwire didn't show in the DRC. There were other airwires on my test board so I conclude that this method seems to work fine for getting around this issue and not needing to add in extra steps.
Best Regards,
Rachael
@matt.berggren wrote:FYI, this has been changed and will be in the next build, barring any major issues. 🙂 What that includes is a DRC check for airwires and any unrouted net connections.
Best regards,
Matt
Hi Matt,
Thanks for getting this feature implemented into the DRC. I like it! It's a simple addition but will save so much time hunting down those pesky hidden airwires that are difficult to find in a large densely populated boards, and no doubt it'll help with reducing the number of people who send incomplete boards to manufacture.
I do think that, as somebody else above suggested, the CAM processor should give a warning before producing outputs if there are airwires still there too though, as it's easy to forget DRC, not so easy to forget to run the CAM processor (unless submitting to a board house who takes .brd files directly)!
Best Regards,
Rachael