EAGLE PCB Layout DRC Clearance Error

[wjinhua6]

Hello, I have a problem with the EAGLE's DRC. It shows me that there is a clearance issue between the two pins of an IC. But the distance between the pins was predefined by the IC's package, what I could do to resolve this error?

BTW, the IC here is LTC1540.

[wjinhua6]

Thank you! Finally, I found the issue was the "Net Classes Clearance", previously I set it to 10mil. Now I changed it to 6mil, and all errors are gone. Do you have any ideas on how the value should be because I am not sure if 6mil is a reasonable value for it?

[one-of-the-robs · Accepted solution]

In general, the default net class shouldn't have anything set. For most "ordinary" signals, the limits that matter are the capability limits of your fabricator / assembler. These signals should all be default net class with no constraints beyond the DRC rules.

Where you want to use net classes should be for specific signals. You may, for example, have some high current traces, where it would be appropriate to assign a net class with increased minimum trace width. Or you may have matched impedance signals with particular clearance requirements. As to what limits are appropriate, that's something you need to figure out based on the signals you're dealing with. It's not an Eagle question.

[wjinhua6]

Thank you very much!

[Anonymous]

Thanks, this helped me alot

[rodrigo.alvarez]

Thank you! This solved it for me on a design I had received from a contractor. 
I set all the values on the net class rules to 0. This is how I had it set up on other projects and with the assumption that the DRC rules will be the enforcers.