Did you edit the uploaded file just now? I downloaded a copy and then a new copy, and the new copy is lacking the bottom layer and no longer has the parallel traces routed.
The issue seems to be with generation of thermals, ie the small tracks that are generated instead of connecting a pad fully to a plane, which helps with solderability. While this seems like a bug that Autodesk needs to look into, here are two suggested workarounds:
1) Click properties for the top ground plane and disable thermals. This is however not ideal because it might affect the soldering properties and for example cause dry joints, when a pad with thermals would not.
2) Create two (or more) ground planes covering smaller parts of the board, for example the top half and bottom half. It seems like the ground planes are allowed to overlap, so you will still get a continuous plane. Each polygon just can't cover more than some magic number of these connectors.
I'm guessing the root of the problem is that the footprint of the connector itself is specifying that holes should have thermals while also covering the top layer with a polygon within the component, causing some sort of conflict within the geometric engine of Eagle. If you could edit the component and remove those polygons, that would probably also solve the issue while also probably not affecting performance since you're filling roughly the same area with copper anyway.
I'm a regular forum user, and not affiliated with Autodesk, but I like contributing to the forums to learn new things about Eagle. If this post answered your question, feel free to mark it as a solution. If something needs clarification, feel free to ask.