Common PCB outline / shape as library component

[TravisJoe]

Hello,

I do a lot common PCB shapes, but they are complex enough that redrawing is not a good option. I know you can copy and paste from other design, but I dislike the reliance on past designs and the face there is no central version controlled outline. Ideally I can make a common outline part with mounting holes that allows me to easily place and tie those holes to nets like GND. This is not too different than my module library parts, except my module parts do not include board outline layers. 

I am pretty sure I can do this, but want to see if there are any known issues or concerns. One I see is potential issues with Fusion Sync, but if the PCB is being pushed to Fusion it becomes dependent on the Eagle side... I think.

Thanks

[one-of-the-robs]

Hi Travis,

I've done something like this in the past, where I defined a library part for a box. The symbol is just a drawing of a box, to signify that it's being specified. The packages consist of the available space inside the various standard enclosures, drawn as an outline on the dimension layer, with holes where the mounting lugs are. It works fine, I've not encountered any problems with it.

Cheers,

Rob

[hudriwudri]

Someone posted about a problem with Fusion when parts of the dimension is defined in a component. Be aware of that.

Found it: Push To Fusion Error:.

[TravisJoe]

Thanks for bringing that up. I wonder if that is in all cases, or only when the PCB outline is defined from Fusion. 

Having a clearance cutout should be a reasonable use-case for having dimension layer in t a component. Having the entire PCB outline does seem like a more complex use of it, but a component level cutout seems fairly common. 

[jorge_garcia]

Hi @TravisJoe,

I believe that error with Dimension lines in components has been resolved or will be resolved shortly. It's actually pretty common for standard board outlines to be turned into components. The cutout option is also common.

Please let me know if there's anything else I can do for you.

Best Regards,

[TravisJoe]

@jorge_garcia

Thanks for the update. I figured that it was not that unusual but was not able to find any definitive answers. Fundamentally it didn't seem like there was any major concerns, but I am glad that any should be resolved now or shortly.

[one-of-the-robs]

I see @jorge_garcia has replied to cover the issue but...

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@TravisJoe wrote:

Having a clearance cutout should be a reasonable use-case for having dimension layer in t a component. Having the entire PCB outline does seem like a more complex use of it, 

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I just wanted to say... whether it's "more complex" depends, I think, on your perspective. The whole-outline-in-a-component method is possibly the less complex one for Fusion360 to deal with, since it doesn't involve any merging. Although that's just a guess since I have no knowledge of the algorithms or data structures actually used in the process.

Cheers,

Rob

[edwin.robledo · Accepted solution]

Hi Travis,

As always, thank you for your post.  In the past, I had learned of some users defining outlines in the library editor, but that has brought up some issues.  An alternative would be to consider building a schematic/board project with the outline you wish to us. Then save the pair as a DesignBlock.

I hope this helps.

Best Regards,

Edwin

[TravisJoe]

Thanks Ed,

Using design blocks seems like a reasonable solution. It does have the cut and paste qualities I am looking for, while retaining flexibility once placed.... hopefully not screwing up things like Fusion sync. 

I will go this route for now. 

It would be nice to either have a managed design blocks. It would help sync, visualize, manage and version design blocks. 

[sprogKCBUL]

Hi,

Eagle 9.4.2, Windows 10

I have created a PCB outline as a library component. Symbol is a descriptive text in a box, the footprint is the dimension on layer 20 which I combined to create the device.

The problem is that the cmd-renumber ULP does not work correctly. There is a comment in cmd-renumber.ulp "Your board MUST be drawn on layer 20 (dimension) and all components MUST be inside it, otherwise the result is unpredictable.\n"

Is there a known problem when the board IS drawn on layer 20 but is part of a library component?

The ULP works fine if the dimension is drawn directly in the PCB editor.

[one-of-the-robs]

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@sprogKCBUL wrote:

The problem is that the cmd-renumber ULP does not work correctly. There is a comment in cmd-renumber.ulp "Your board MUST be drawn on layer 20 (dimension) and all components MUST be inside it, otherwise the result is unpredictable.\n"

Is there a known problem when the board IS drawn on layer 20 but is part of a library component?

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I wouldn't be at all surprised by that. The ULP is looking for the outline by iterating over the board's "wires" method. This will return only the wires defined in the board as wires - i.e. directly drawn lines. The outline in your component is drawn in the footprint, so it can only be accessed through the properties of the relevant "element".

[sprogKCBUL]

OK, thanks

Andrew