Move command can delete wires

[Anonymous]

There are certain configurations of wires that when grouped and moved will get deleted. This happens both selecting and moving with the mouse and with scripts (in our case our panelization process is where it caused us grief). This will not happen if you move the lines individually.

I have attached a simple example.

load the file and execute: 

display all; group all; move (> 0 0) (0 0);

or just select and move with the mouse.

This will delete two segments of N$83 and makes the circuit nonfunctional.

This bug has cost us thousands of dollars in mis-manufactured pcbs not to mention lost time.

We have lost a lot of trust in Eagle.

doesn't happen in 9.0.1

happens in 9.1.2 and 9.1.3

[havlicek6TH3H]

Hi,

I tried to test it and it seems that it´s caused by option preserve angles in move command. When you try to change mode of move command to free, these signals don´t  disappear. It´s generally strange because I tried to delete these signals, route them again, move with whole layout and these signals didn´t diseappear. So there is something wrong with these signals but I didn´t find what is it. I think it´s somehow caused by 2 signals (N$83 between D3 and R39) which are overlapping.

It´s pretty serious bug.

Best regards.

Vojta

[rachaelATWH4]

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@Anonymous wrote:

This bug has cost us thousands of dollars in mis-manufactured pcbs not to mention lost time.

We have lost a lot of trust in Eagle.

This is not good at all, I'm sure Autodesk will be wanting to get this bug fixed ASAP though and they are pretty good at getting onto and fixing serious bugs now so I think we can trust this will get resolved as quickly as possible.

It does serve as a reminder to always run DRC whenever you've done any changes, no matter how small they may seem, before you generate board outputs. This would have picked up the new airwires from the deleted traces and you could have corrected this before sending your boards to be manufactured. I have a checklist I run through prior to generating manufacturing outputs and this has saved me from getting faulty boards a few times.

Best Regards,

Rachael

[Anonymous]

We do run DRC after panelization. The insidious thing about this bug is
that DRC does not detect this as an error.

If you have a schematic when it happens the wires will turn to airwires so
that is detectable. But as we were having this issue during panelization
where there is no schematic there is no new DRC error or any indication
that the wires were deleted..

[havlicek6TH3H]

Try to ratsnest and then DRC I think that it could works. 

[rachaelATWH4]

---

@Anonymous wrote:
We do run DRC after panelization. The insidious thing about this bug is
that DRC does not detect this as an error.

If you have a schematic when it happens the wires will turn to airwires so
that is detectable. But as we were having this issue during panelization
where there is no schematic there is no new DRC error or any indication
that the wires were deleted..

---

Right ok, you are right, if you do DRC right after the move then it doesn't show the error. However, if as @havlicek6TH3H suggests, you do RATSNEST first then it does pick up the airwires. I just tested this out on the board fragment you sent and it does pick up the issue in this instance.

So I think there are two things for Autodesk to fix:

1) The reason for the disappearing trace (it's actually a bit of a messy route and when I tidy it up it no longer disappears but that's beside the point, it should not do this)

2) Why doesn't DRC pick up the airwires without first recalculating them with RATSNEST. I think it should still see them schematic or not.

But the short term workaround is to always do a RATSNEST before a final DRC.

Best Regards,

Rachael

[Anonymous]

You are correct that the airwires do show up after a ratsnest...  That is somewhat obvious in retrospect.

However.. Having to run ratsnest for DRC to function properly seems like another bug.. If its required it should be part of the process... Just one more thing for a human to forget to do when they open a file to run DRC on it. Even if it was just a configurable option in the DRC settings that would be great.

[jorge_garcia]

Hi Everyone,

A bug report has been filed for this and we will be getting right on it to have a solution as soon as possible. We apologize for any inconvenience this has caused.

Stay tuned.

Best Regards,

[jorge_garcia]

Hi @Anonymous,

I hope you're doing well. Just to update, the bug has been fixed for the release of 9.2.0. In the meantime, follow Rachael's suggestion to combine Ratsnest and DRC to catch any issues that might crop up.

Please let me know if there's anything else we can do for you.

Best Regards,

[Anonymous]

Hello, 

The first example I posted was fixed with 9.2.0 but we have found another that is not fixed with 9.2.0.

I also had frequent crashes during MOVE while working with this example file so I think there is a ways to go still. 

[jorge_garcia]

Hi @Anonymous,

Dang, could you specify what component or group exhibits the behavior? I know our devs are super interested in getting this fixed.

Any and all information you can provide would help. If you can record a screencast that would be even better.

Best Regards,

[Anonymous]

Was the brd file I attached not sufficient to reproduce the issue?

[Pieter.Jan.Van.de.Maele]

What is the operation to perform on the brd file to reproduce the issue? If I do the same as the original post (group the whole circuit + invoke move) I can not see any issues. 

[Anonymous]

You are correct it does require a different command.

group all; move (> 0 0) (1 0);

or just use the gui to select and move. 

One of the wires on the +3v3 net disappears.

[Pieter.Jan.Van.de.Maele]

Are you talking about this segment:

If so, it seems like there is a segment underneath with exactly the same coordinates (but different width). The preserve angles tool seems to try to optimize this and removes 1 of both. We'll look into this and make sure it preserves both. This seems to also crash the tool in some situations.

[Anonymous]

The vertical line there is what disappears for me:

[Anonymous]

Hello, just checking in on this.

I have found another weirder one as well.

Same repro, load and 'group all; move (> 0 0) (0 0)'

It is weirder as it won't disappear if you ripup the distant ground vias before running the command.

The wires are pretty messy but I should be able to panelize it without having wires disappear...