I cannot export IGES.

[watanabetakamitsu]

Some surfaces of wire file cannot be exported to IGES.
IGES export succeeds by selecting and exporting the surface in the wire file little by little.
Are there any restrictions such as file size for IGES export?

The working environment is as follows.
Alias2019.4
OS: Windows10
PC used: HP Z8

[rauscht]

Hi,

sorry to hear that you are facing problems by performing a wire -> IGES translation.

There is no known hard limit to the wire file size which can be processed by the translator (except available memory of course). Depending on the wire file size, the needed memory and time for the translation process will increase. How big is your wire file, though? Can you share that wire file? Maybe on a more private channel and only with me? In that case I could investigate what is happening here.

Have you checked the log file? Are there any error messages which indicate a general translation issue (such as degenerated surface patches, invalid trims etc.)?

The translation is performed in a separate process (not in the Alias process directly). This implies that even after the progress bar seems to indicate that the translation work is done already, the translation is still ongoing. In case of an export, the progress bar just indicates the progress of reading and preparing the wire data for translation. Once this is done, the translation continues and the user may continue with modeling in Alias without impacting the ongoing translation process.

By using Windows' task manager you can spot this translation process - and by this you can figure out if it is still running, how much memory and CPU it is consuming, and if it causes network load etc.

And talking about network load: Are you writing to a remote location such as a network drive? If you do, please check if the translation process is working for you when writing to your local drive instead.

These are just some ideas which hopefully help you to deal with the situation. If the problem persists, it would be best to share a sample wire file which is showing the bad behavior. And let me (or the team) further investigate.

Thanks

Thomas

[watanabetakamitsu]

Thank you for your reply.
Unfortunately, we can't give you data.
Possible causes are surfaces converted from CATIA data. After removing a part of the surface converted from CATIA, the IGES conversion was performed on the entire remaining surface without any problems. However, the removed surface was able to be created without any problems by performing IGES conversion on its own. May contain degenerate surface patches, invalid trims, etc. Attach a screen capture showing the CV of the suspected surface. This is terrible data, but such data is often handled.

[Anonymous]

i would first test a shrink operation on these heavy surfaces...

But sometimes trim regions are interpreted in a wrong way. I had this a few times. You will have to find these surfaces and trim them again. Maybe you'll even have to project the cutting edges again. Shrinking allone does not solve these wrong trims.

Regards...