topic Bad UX with vias in pad in Fusion Electronics Forum

Bad UX with vias in pad

silvio3105 — Sun, 25 Sep 2022 14:15:05 GMT

Hi,

Fusion is really bad with UX for vias in (SMT) pad.

- DRC reports overlap error even pad and via are same signal/net.

- User has to manually connect pad to via with trace, even via's annular ring is part of SMT pad.

Here you can see airwire from via to +5V pad. Via is 0.2/0.4mm.

Re: Bad UX with vias in pad

silvio3105 — Tue, 04 Oct 2022 16:06:54 GMT

@jorge_garcia

Re: Bad UX with vias in pad

jorge_garcia — Thu, 06 Oct 2022 22:09:32 GMT

Hi @silvio3105,

So technically only micro-vias should be placed within the boundary of a pad. The reason for this, is that it avoids solder being sucked down the via and away from the pad, because micro vias have small diameters and shallow depth. If you do the same thing with a normal size via there is the posibility of all the solder paste wicking down the via and the manufacturing defect that follow(tombstoning, poor component adherance, etc.).

I think that may be why the DRC reports it, if you did it with a micro-via I don't think you would get that error.

Best Regards,

Re: Bad UX with vias in pad

silvio3105 — Thu, 06 Oct 2022 22:20:05 GMT

How to place micro via? This via on picture is 0.2/0.4mm.
I know for possible solder suction, but I don't think 0.2/0.4mm via will be a problem.
That's the reason why I place vias at corners.

Still I think DRC should report nothing since both via and pad belong to same signal.

Re: Bad UX with vias in pad

jorge_garcia — Fri, 07 Oct 2022 19:47:09 GMT

Hi @silvio3105,

I hope you're having a good day. Micro-vias are a special case. To use them you have to set the min Micro-via setting to be smaller than the min drill value. Microvias are also only one layer deep so you need to have blind vias setup. I will report this because I don't think the DRC has always reported same signal overlaps.

Let me know if there's anything else I can do for you.

Best Regards,