topic Re: Restrict Top DRC bug ? in Fusion Electronics Forum

Restrict Top DRC bug ?

PeterA4L — Tue, 15 Oct 2024 12:04:27 GMT

I have along the brd outline a routing void (layer 41) now it is imposssible to move traces with push violators on.

Re: Restrict Top DRC bug ?

jorge_garcia — Tue, 15 Oct 2024 21:04:28 GMT

I hope you're doing well. So if you are trying to push that trace against that inner restrict it's gone as far as it can go. Any reason you are use that restrict following the board outline? The board outline clearance rule handles this automatically without you having to draw that restrict.

If you can elaborate a little more on what you are trying to do I would be happy to go into more detail.

Let me know if there's anything else I can do for you.

Best Regards,

Re: Restrict Top DRC bug ?

PeterA4L — Mon, 21 Oct 2024 10:28:55 GMT

There is a genaral rule for the brd outline clearance, i don't want to overwrite that. (that is good practice)

It is also affecting the NPTH (these have brd-outlines as well)
So I am using a routing void instead, because in this case I need extra clearance for my housing construction.
But that void is now preventing me to push my traces.

Please let me know if there is anything else i should clarify ?

Re: Restrict Top DRC bug ?

jorge_garcia — Wed, 23 Oct 2024 20:54:00 GMT

Hi @PeterA4L ,

I hope you're doing well. That's kind of the nature of the beast, the routing void will limit how far the traces can be pushed. The new DRC actually lets you define a clearance from the restrict layers which wasn't possible before, this may allow you to use thinner restrict features.

If you can't move the traces around, change the mode to ignore violators and see what errors crop up. That will give you an idea of what rules are interferring.

Best Regards,

Re: Restrict Top DRC bug ?

PeterA4L — Mon, 28 Oct 2024 12:37:48 GMT

Copper - Restrict clearance is 0 (enabled can't be changed)

So I should be able to push my traces to the edge of that void. (with push violotars on)

This doesn't work!

If i do it with ignore violotars i can push my traces to the edge of the routing void

and no errors crop up when i run the design rule check.

I don't understand why the Copper - Restrict clearance rule is added.

The routing void is like a fence, you can get to the edge and no futher. If you need a thick fence you can do so.

You see what you are doing...

Adding an invisable barrier by setting the Copper - Restrict clearance > 0 is redundant

Re: Restrict Top DRC bug ?

jorge_garcia — Wed, 30 Oct 2024 20:35:46 GMT

Hello @PeterA4L ,

I hope you're doing well. I'm wondering why you are having to use ignore violators. Is there any chance you can record yourself routing a little bit. There's something here I'm not getting.

As far as the utility of Copper Restrict clearance, I see your point but there may be some use case both of us are missing since other tools permit it.

Let me know if there's anything else I can do for you.

Best Regards,

Re: Restrict Top DRC bug ?

PeterA4L — Tue, 05 Nov 2024 15:02:19 GMT

See Message 5

https://forums.autodesk.com/t5/fusion-electronics/need-a-feature-to-make-panels-in-an-easy-way-also-polygon-pour/m-p/13120242#M18038

When you upload this Test_Panel:

Note that you can't push the traces with Push violators on.

"As far as the utility of Copper Restrict clearance, I see your point but there may be some use case both of us are missing since other tools permit it." What other tools are you refering to?

Re: Restrict Top DRC bug ?

jorge_garcia — Tue, 05 Nov 2024 22:30:48 GMT

Hi @PeterA4L,

I hope you're doing well. Other tools like Altium and Cadence afford that level of control. I was playing with your test panel file and found something interesting. Try looking at the polygon settings and check the orphans box you'll see it fill. Then uncheck the box and refill the polygon, is this result more inline with what you were expecting?

Now I found something interesting about why you are not able to push. There is something off about how these LED components where made. If you unroute a trace and try routing it again, you'll see that it starts in violation (it has a red circle with the diagonal through it). When that happens the routing goes to ignore violators and the violators engine then has issues with pushing and things like that. I would be very interested in seeing how those were made.

Let me know if there's anything else I can do for you.

Best Regards,

Re: Restrict Top DRC bug ?

PeterA4L — Wed, 06 Nov 2024 13:51:06 GMT

Hi Jorge,

The red circle with the diagonal through it disappears when the routing void (Restrict Top) is gone.

hence my Title Restrict Top DRC bug ?

It has nothing to do with the components because the same happend if you choose another net, not connected to the LED's

The trick with the Orphans did indeed work, but is that how you want it to work?

Re: Restrict Top DRC bug ?

PeterA4L — Mon, 18 Nov 2024 14:54:21 GMT

Still waiting...

Re: Restrict Top DRC bug ?

jorge_garcia — Mon, 18 Nov 2024 23:32:16 GMT

Hello @PeterA4L,

I hope you're doing well. How we want it to work, is probably not the right question at this time. Currently there's no proper supported panelization workflow, so as far as Fusion is concerned we are in uncharted territory. I'm just trying to get you up and running.

I figured out the situation with the Top Restrict Circle, in general circles do not behave well with polygons and this is one of those scenarios. If you replace the Top Restrict Circle with an equivalent shape made up of 2 arcs you'll see the NOGO(red circle icon, that's what I'm calling it now) icon is gone and you'll be able to push and move traces around properly.

Let me know if there's anything else I can do for you.

Best Regards,