topic Re: Pad(T.H) size is different on top and bottom and different on inner layers! in EAGLE Forum

Pad(T.H) size is different on top and bottom and different on inner layers!

kshirsagar564 — Sat, 23 Jan 2021 13:01:33 GMT

Dear members,

Wishing you health and well being!

Brief:-

I got a pcb manufactured and while testing I found two planes/polygons short(two planes with different names ).

Initially I thought there was some problem with component placement, but later when the same problem persisted even with the bare board I understood that the mistake lies in routing/manufacturing.

Now here's when funny things start.

I checked the DRC and ERC and found that the design was without any error!

Observations:-

1) See fig1. this shows TOP layer. Please observe the long shaped pads.

2) See fig2. this shows inner layer. Again observer the pads. You see circular pads!!

3) See fig3. this shows polygon pour for top layer and inner layer.

"You can see that the white coloured inner layer polygon intersects with gnd1 pad."

Conclusion:-

1) This intersection must be causing the short between two polygons.

Questions:-

1) Why do we see two different shapes of same pads on two different layer?

2) If there was any intersection between different signal and pad why didn't the DRC catch it?

Re: Pad(T.H) size is different on top and bottom and different on inner layers!

kshirsagar564 — Sat, 23 Jan 2021 13:06:20 GMT

PFA

Re: Pad(T.H) size is different on top and bottom and different on inner layers!

one-of-the-robs — Sat, 23 Jan 2021 14:27:33 GMT

If the overlap of an outside pad with an inside layer causes a short then the board is not manufactured according to the design. This is not Eagle's fault but an error in the way you generated Gerbers or communicated them to the fab house.

The inner layers don't get elongated pads because there's no point. The elongation serves to facilitate soldering or allow for kinked legs, neither of which are relevant to the inner layers. Thus the rings around PTH holes on inner layers are all round. They can also be a different size to the outer layers.

The DRC didn't catch your error because it's not in the design but in the manufacturing process. It's perfectly valid for inner layer copper to "overlap" outer layer copper of a different signal - how else would you get any benefit from multi-layer boards?

So, on to the REAL problem.

You are trying to achieve slotted holes. You put milling layer objects to represent the slots. You may even have got your board house to make PTH slots there. But you didn't read up on the correct way to do PTH slots on Eagle and missed a crucial step. The milling data doesn't create keepout for the copper flood - you need to add that manually in the footprint. Search the forum for PTH slotted holes to find fuller instructions.

Re: Pad(T.H) size is different on top and bottom and different on inner layers!

kshirsagar564 — Thu, 01 Apr 2021 13:37:33 GMT

@one-of-the-robs

Thanks for the insight. If it weren't for this problem I would not have known about the principle of using T.H pads!!

I used a readily available library for this connector. The library was not intended for 4 layers. And I had to "manually" add two additional layers in between for isolation.

"So depending upon the number of layers used we would be required to make changes in library for an error free slotted hole using MILLING layer"

It would have been better if we could get a warning/error in EAGLE.

@jorge.garcia If you are looking at this please consider.

For a basic idea you can look at:-

"https://blog.snapeda.com/2019/10/20/how-to-output-cutouts-and-slotted-holes-in-eagle-for-oshpark/"

Thankyou

Re: Pad(T.H) size is different on top and bottom and different on inner layers!

jorge_garcia — Thu, 01 Apr 2021 20:07:29 GMT

Hi @kshirsagar564 ,

I hope you're doing well. We are aware of this limitation and hope to provide a better way at some point.

Thanks for pointing this out.

Best Regards,