Heat vias & splitting board material properties?

[JohnTomasik6493]

I have two questions:

1.  Our client wishes to use vias to help conduct heat from some of their chips.  I use a compact thermal model property for some of the chips in my study.  I noticed (through some error) that those compact thermal model components appear to be allowed only to contact a single board on one side.  If my observation is correct, how can I model thermal vias that my client will add only to high heat components as a means to conduct heat down into the board?

2.  One of the boards will carry a significantly different trace coverage in one area than in others, even though the layer count will be the same.  What would be the best means of modeling this? 

[Jon.Wilde]

Hi John,

You are correct yes, the CTM must sit etween a PCB on one side (or a part with PCB in it's name) and air on the other.

Could you add another solid volume within the PCB to represent the high conductivty region of the vias? Bear in mind that this material would still need 'PCB' somewhere in it's name to work with a CTM.

Question 2 has a similar answer - you can either model the PCB as is (not ideal) or add in volumes with a higher conductivity to represent these regions.

Hope that helps,

Kind regards,

Jon